The present invention generally relates to memory devices, and more particularly to a technique for extending the life of a NAND-based flash memory device by reducing the number of unnecessary write cycles to the device.
Solid state drives comprising NAND-based flash memory are rapidly evolving to become the non-volatile memory of choice in desktop and high-performance computing. Despite the advantage in access time over non-volatile memory as it is used in the case of rotatable media such as hard disk drives, a notable disadvantage of NAND flash memory is that data cannot be simply overwritten. This limitation of flash memory is caused by the fact that individual bits can only be altered from 1 to 0 but not vice-versa. Consequently, before any rewriting of data, the entire content of a page must be erased by programming all cells to 1. In addition, pages within a block of NAND flash memory are statically mapped, that is, each page within a block has a unique address that cannot be changed. If data are written to NAND flash memory, they are typically written over multiples of physical blocks using the same page address in each block. If any page must be updated, it must be written to the same page address but the fact that it is impossible to overwrite the existing page means that it must be written to a different block and subsequently, the logical to physical block mapping must be updated. The change in logical block mapping, in turn, means that all contents within the block that was altered must be moved to the new block corresponding to the logical block address.
In a scenario like that described above, the consequence is that the write efficiency is extremely low for small files. For example, in typical architectures employing 128 pages of 4 KB in each block, rewriting a single 4 KB file fragment requires the re-writing of all 128 pages within the block, depending on how many pages in the respective block contain data. If a target block previously contained data, the block must first be erased prior to the re-writing operation. Consequently, rewriting 128 files of 4KB file fragments can require up to 128 erase and write cycles for each single file instead of a single file update.
Every programming cycle of NAND flash memory entails the injection of electrons into the floating gate through quantum-mechanical tunneling through the tunneling oxide of the NAND cell. Likewise, every erase cycle entails the removal of electrons from the floating gate through tunneling in the reverse direction. Over time, the tunneling oxide degrades and exhibits broken atomic bonds that can trap electrons. As a result, the tunnel oxide becomes electrically negative, causing a shift in programming/erase speed in which the programming operation becomes faster whereas the erasing operation becomes slower. Because of this build up of charge as a factor of the number of erase/write cycles, the number of cycles for each NAND cell is finite and, consequently, the number of cycles (endurance) of a NAND flash memory device is also finite.
The problem arising from the static mapping of pages within a NAND block is well documented and several ways have been proposed to alleviate the issue. Primarily, these issues include intelligent management of data to keep the number of program cycles to a minimum, with the view “that the best write is the one that does not happen.” In other words, valid strategies are that intermediate data and meta-data referring to the actual data are typically processed on the level of the system memory, and the final data are then sent to the drive where they are cached in the drive's cache or buffer. Once the data in the buffer reach a certain size, they are combined to a logically coherent set of data and then written in one sweep to the flash memory array, typically using all channels available. This type of write-combining eliminates a large part of small random writes, but it is only one step to better management of NAND flash memory blocks. Another strategy uses a RAM-disk wherein all data are exclusively written to memory and only on system shut-off are committed to a NAND flash-based solid state drive. Those optimizations are primarily implemented on the level of the operating system or on the drive architecture/firmware.
U.S. Patent Application Publication No 2008/0288713 to Lee et al. discloses a somewhat different approach by copying heavily accessed data to a separate volatile memory which uses dynamic page mapping, and only the final data are committed to a NAND flash memory. This type of approach is optimized on the basis of temporal locality for data base management systems. None of the mentioned approaches, however, addresses the fundamental issue arising from the static page mapping of NAND blocks.
In view of the above, it can be appreciated that an ongoing limitation of NAND-based flash memory is that individual memory cells cannot be rewritten and, because of static page mapping, single page updates require an entire block featuring the modified page to be rewritten to an empty block. In view of their finite number of cycles, there is an ongoing desire to minimize the number of program cycles of NAND flash memory devices.